Makefile Explained - Part-1

Sorry for a long delay. I was held up tight in my previous project. Now, I have time to breathe, and enjoy the blue sky.

Let is say I have a file hello.cpp, now how we compile it:
c++ -o hello hello.cpp

if you have installed g++:
g++ -o hello hello.cpp

Generic format:

{compiler name} -o {output file} {source file}

-o - option to specify output filename. If we don't specify {output file}, by default the output will be written to "a.out" file.

"a.out" - assembler output

A Simple Makefile:

hello: hello.cpp
{tabspace}g++ -o hello hello.cpp

Output:
$make hello
g++ -o hello hello.cpp
$

Look at the output, when I give "make hello" command, the make command searches the "hello" target in the makefile and executes the command given for "hello" target.

This makefile make our life easier, we don't need to type "g++ -o hello hello.cpp" everytime, instead we can just give "make hello" which will take care of compiling it.

In my next post, we will see how Make utility can make our life more easier.